Shantanu Dutt is a full professor at the Department of Electrical and Computer Engineering, University of Illinois at Chicago. He received his Ph.D. in computer science and engineering from the University of Michigan, Ann Arbor, his M.Tech. in computer engineering from IIT Kharagpur, and his B.Tech. in electronics and communication engineering from the M.S. University of Baroda, India.

Prof. Dutt was awarded a Research Initiation Award by the National Science Foundation. His current technical interests include CAD for sub-micron VLSI circuits, optimization algorithms, fault-tolerant computing, and testing and trusted design for emerging VLSI technologies. His research is or has been funded by NSF, DARPA, AFOSR and companies like Xilinx and Intel. He has published more than 70 papers in well-recognized archival journals and refereed conferences in all the above areas. He has received a Best-Paper award at the Design Automation Conference (DAC), 1996, a Most-Influential-Paper award from the Fault-Tolerant Computing Symposium (FTCS) in 1995 (for an FTCS'88 paper), a Best-Paper nomination at DAC 2004, and was a featured speaker (1 of 2) at the Int'l Conference on CAD (ICCAD), 2006.

He has contributed invited articles in the Wiley Encyclopedia of Electrical and Electronics Engineering, and the Electrical Engineering Handbook from Academic Press. He has been on several NSF review panels, and on many technical program committees of conferences on VLSI CAD, fault-tolerant computing and parallel processing. In the VLSI CAD area, he was a co-chair of the Tools and Methodology track of ICCD'04 and on the technical program committees of ICCD'03, GLSVLSI'04-'08, and ICCAD'08-'09.