Possible 565 Projects

Note that some of the following project descriptions are those of the broader projects in out lab; smaller chunks doable as course projects are listed after the broad project descriptions.

1. Incremental Placement and Routing
   
   
2. New testing and fault tolerance methods for FPGAs.
   
   
3. Simultaneous Exploration of Objective Optimization and Design Constraints during Placement for Deep Sub-Micron VLSI
   
   
4. Timing-Driven Partitioner
   
   
5. ML-RCS or MR-RLS scheduling algorithm that dynamically updates node criticalities (e.g., ALAP times) and the current critical path delay and schedules accordingly. This should perform better than standard ML-RCS/MR-RLS algorithms discussed in class.
   
   
6. 4-way PROP