This is the assembly language (slow div. version):

        load_imm r3, 2AH
        load_imm r2, 81H
        load_imm r1, 46H
        load_imm r0, 93H
        add_ext
        load_imm r3, 76
        sw+ r3, r1, 1
        sw+ r3, r0, 1
loop:   lw+ r1, r3, 1
        lw+ r0, r3, 1
        mul_slow r2, r1, r0
        sw+ r3, r2, r1
        load_imm r0, 75
        load_ind r2, r0
        load_imm r1, 1
        sub r2, r2, r1
        store r2, 75
        bge r1, r2, 2
        jump loop
        load_imm r3, 101
loop2:  lw+ r1, r3, 1
        lw+ r0, r3, 1
        div_slow r2, r1, r0
        sw+ r3, r2, 1
        load_imm r0, 100
        load_ind r2, r0
        load_imm r1, 1
        sub r2, r2, r1
        store r2, 100
        bge r1, r2, 2
        jump loop2
        halt

        count: 6
        a[1]: 6
        b[1]: 12
        c[1]: 0
        a[2]: 1111 0101
        b[2]: 9
        c[2]: 0
        a[3]: 1000 0000
        b[3]: 1111 1111
        c[3]: 0
        a[4]: 127
        b[4]: 2
        c[4]: 0
        a[5]: 3
        b[5]: 2
        c[5]: 0

        count2: 6
        a1[1]: 72
        b1[1]: 2
        c1[1]: 0
        a1[2]: 0111 1101
        b1[2]: 12
        c1[2]: 0
        a1[3]: 102
        b1[3]: 14
        c1[3]: 0
        a1[4]: 0101 1111
        b1[4]: 0000 0101
        c1[4]: 0
        a1[5]: 64
        b1[5]: 3
        c1[5]: 0


NOTE: There are 4 24-bit place holders for 4 lw+ instrs., each
place holder given as:
i: blank, values of ri, rj, X fields
i+1: blank
i+2: blank
for an lw+ instr. starting at address i. You need to fill
in your 24-bit format in these place holders. Also, note
that the constant X can be a 4-bit constant; the mem file will
not contain any X value that cannot fit in as a 4-bit 2's compl. #,
i.e. X will have the range [-8, 7].


mem file for project 2 (slow div. bersion)
%

0: 0010 1010
1: 001001 11

2: 1000 0001
3: 001001 10

4: 0100 0110
5: 001001 01

6: 1001 0011
7: 001001 00

8: 00 00 0000
9: 001111 00

10: 76
11: 001001 11

12: 11 01 0001
13: 001101 11

14: 11 00 0001
15: 001101 11

16: blank, ri=1, rj=3, X=1 (these are the values of these fields in lw+)
17: blank
18: blank

19: blank, ri=0, rj=3, X=1 (these are the values of these fields in lw+)
20: blank
21: blank

22: 01 00 0000
23: 010001 10

24: 11 10 0001
25: 001101 11

26: 75
27: 001001 00

28: 00 00 0000
29: 001011 10

30: 1
31: 001001 01

32: 10 01 0000
33: 000100 10

34: 10 10 0000
35: 001100 00
36: 75

37: 01 10 0010
38: 000110 00

39: 16
40: 001000 00

41: 101
42: 001001 11

43: blank, ri=1, rj=3, X=1 (these are the values of these fields in lw+)
44: blank
45: blank

46: blank, ri=0, rj=3, X=1 (these are the values of these fields in lw+)
47: blank
48: blank

49: 01 00 0000
50: 010010 10

51: 11 10 0001
52: 001101 11

53: 100
54: 001001 00

55: 00 00 0000
56: 001011 10

57: 1
58: 001001 01

59: 10 01 0000
60: 000100 10

61: 10 10 0000
62: 001100 00
63: 100

64: 01 10 0010
65: 000110 00

66: 43
67: 001000 00

68: 00 00 0000
69: 001110 00

75: 6
78: 6
79: 12
80: 0
81: 1111 0101
82: 9
83: 0
84: 1000 0000
85: 1111 1111
86: 0
87: 127
88: 2
89: 0
90: 3
91: 2
92: 0
100: 6
101: 72
102: 2
103: 0
104: 0111 1101
105: 12
106: 0
107: 102
108: 14
109: 0
110: 0101 1111
111: 0000 0101
112: 0
113: 64
114: 3
115: 0