Dr. Masud Chowdhury

 

 

Patent Disclosures

1.       Masud H. Chowdhury, C. S. Amin, and Y. I. Ismail, “Realizable Reduction of RLC Circuits Using Node Elimination.” Patent pending with Semiconductor Research Corporation (SRC)

 

Reduction of an extracted netlist is an important step in the design and analysis of VLSI circuits. This work describes a method for realizable reduction of extracted RLC netlists by node elimination. The proposed method eliminates nodes with time constants below a user specified time constant. By giving the freedom to the user to select a critical point in the spectrum of nodal time constants, this method provides an option to make a trade off between accuracy and reduction. The proposed method preserves the dc characteristics and the first two moments at all nodes. It also recognizes and eliminates all the redundant inductances generated by the extraction tools. The proposed method naturally reduces to TICER in the absence of any inductances

 

Publications

Journal Papers:

1. Jingye Xu, Vivek P. Nigam, Abinash Roy, and Masud H. Chowdhury, “Compound Noise Separation in Digital Circuits Using Blind Source Separation”, Microelectronics Journal, Elsevier, In Press

2.  Shriram Krishnamoorthy and Masud H. Chowdhury, “Compact Thermal Network Model: Realization and Reduction”, Journal of Integrated Computer-Aided Engineering (ICAE), In Press           

3.  Masud H. Chowdhury and Yehea I. Ismail, "Behavior and Analysis of Deep Sub-micron Integrated Circuits Including Self and Mutual Inductances, " Journal of Circuits, Systems & Signal Processing, Birkhäuser (Springer), February, 2008, vol. 27, no. 1, pp. 23-34

4.  Jingye Xu, Abinash Roy, and Masud H.Chowdhury, “Noise Separation in Analog Integrated Circuits”, Journal of Integrated Computer-Aided Engineering (ICAE), Vol.15, Number 2, 2008. Page(s): 163-180

5.  Jingye Xu, Abinash Roy, and Masud H. Chowdhury, “Power Consumption and BER of Flip-flop Inserted Global Interconnect", Journal of VLSI Design, Volume 2007, Article ID 42829, 8 Pages, 2007

6.  Masud H. Chowdhury and Yehea I. Ismail, “Realistic Scalability of Noise in Dynamic Circuits,” IEEE Transaction on Very Large Scale Integration (TVLSI), Volume 14, Issue 6, June 2006 Page(s): 637 - 641

7.  C.S. Amin, Masud H Chowdhury and Y.I. Ismail, “Realizable reduction of interconnect circuits including self and mutual inductances,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 24,  Issue 2,  Feb. 2005 Page(s):271 – 277

 

Conference Papers:

Year 2008

8. Abinash Roy and Masud H. Chowdhury, “Impacts of Signal Slew and Skew Variations on Delay Uncertainty and Crosstalk Noise in Coupled RLC Global Interconnects”, accepted at The 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS), to be held in Malta from 31 AUG - 3 SEPT 2008.

9.  Md. Sajjad Rahaman and Masud H. Chowdhury, “Joint Coding for RLC Coupling-Aware on-Chip Buses”, accepted at the 2008 IEEE Midwest Symposium on Circuits and Systems (MWSCAS), to be held in Knoxville, TN, USA from August 10-13, 2008

10.   Abinash Roy and Masud H. Chowdhury, “Analysis of the Impacts of Signal Rise/Fall Time and Skew Variations in Coupled-RLC Interconnects", Proceedings of the 2008 IEEE International Symposium on Circuits and Systems (ISCAS), Seattle, WA, USA, May 18-21, 2008, Page(s) 2426-2429

11.   Jingye Xu and Masud H. Chowdhury, “Full Waveform Accuracy to Estimate Delay in Coupled Digital Circuits", Proceedings of the 2008 IEEE International Symposium on Circuits and Systems (ISCAS) Seattle, USA, May 18-21, 2008, Pages(s): 3414-3417

12.   Jingye Xu and Masud H. Chowdhury, “Optimization Technique for Flip-Flop Inserted Global Interconnect", Proceedings of the 2008 IEEE International Symposium on Circuits and Systems (ISCAS), Seattle, USA, from May 18-21, 2008, Pages(s): 3386-3389

13.   Md. Sajjad Rahaman and Masud H. Chowdhury, “Time Diversity Approach for Intra-Chip RF/Wireless Interconnect Systems", Proceedings of the 2008 IEEE International Symposium on Circuits and Systems (ISCAS), Seattle, WA, USA, May 18-21, 2008, Page(s) 2434-2437

14.  Masud H. Chowdhury, Juliana Gjanci, and Pervez Khaled, “Innovative Power Gating for Leakage Reduction", Proceedings of The 2008 IEEE International Symposium on Circuits and Systems (ISCAS) Seattle, WA, USA, May 18-21, 2008, Page(s) 1568-1571.

15.  Md. Sajjad Rahaman and Masud H. Chowdhury, “BER Performance Comparison between CDMA and UWB for RF/Wireless Interconnect Application”, Proceedings of  The 2008 IEEE International Conference on Electro/Information Technology (EIT 2008), May 18-20, 2008, Ames, Iowa

16.  Shriram Krishnamoorthy and Masud H. Chowdhury, “Compact Thermal Network Model: Realization and Reduction”, Proceedings of  The 2008 IEEE International Conference on Electro/Information Technology (EIT 2008), May 18-20, 2008, Ames, Iowa

17.   Jingye Xu, Pervez Khaled, and Masud H. Chowdhury, “Fast bus waveform estimation at the presence of coupling noise”, Proceedings of IEEE/ACM Great Lakes Symposium on VLSI (GLSVLSI 2008), Orlando, Florida, USA, May 4-6, 2008, Page(s) 339-342.

18.   Md. Sajjad Rahaman and Masud Chowdhury, “Improved Bit Error Rate Performance in Intra-Chip RF/Wireless Interconnect Systems”, Proceedings of IEEE/ACM Great Lake Symposium on VLSI (GLSVLSI 2008), Orlando, Florida, USA, May 4-6, 2008, Page(s)

19.   Md. Sajjad Rahaman and Masud Chowdhury, “Hybrid Bus-Invert Coding for RLC Coupling-Aware On-Chip Buses”, Proceedings of The IEEE CCECE'08: Symposium on Circuits, Devices and Systems, Niagara Falls, Canada, May 4-7, 2008

20.   Masud Chowdhury,  Juliana Gjanci,  Pervez Khaled, “Controlling Ground Bounce Noise in Power Gating Scheme for System-on-a-Chip”, Proceedings of The IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2008), 7-9 April 2008, Montpellier, France

Year 2007

21.  Abinash Roy and Masud H. Chowdhury, “Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew”, Proceedings of 44th IEEE/ACM Design Automation Conference (DAC) 2007, 4-8 June 2007, Page(s):184 - 187

22.   Jingye Xu, Abinash Roy, Masud Chowdhury, "Analysis of Power Consumption
and BER of Flip-flop Based Interconnect Pipelining" Proceedings IEEE/ACM of Design,
Automation and Test in Europe (DATE) 2007, April 16-19, 2007, pp. 1218-1223

23.   Pervez Khaled, Jingye Xu, and Masud H. Chowdhury, “Dual Diode-Vth Reduced Power Gating Structure for Better Leakage Reduction”, IEEE MWCAS 2007, In Press

24.   Shriram Krishnamoorthy and Masud H. Chowdhury, “Nodal and Spatial Analysis for a Compact Thermal Modeling Methodology”, Proceedings of The 15th annual IEEE International Conference on Advanced Thermal Processing of Semiconductors (RTP2007), Catania, Sicily, Italy, 2-5 Oct, 2007, Page(s) 139-144

25.   Abinash Roy, Noha Mahmud and Masud H. Chowdhury, “Delay and Clock Skew Variation due to Coupling Capacitance and Inductance” Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) , 27-30 May 2007, Page(s):621 - 624

26.   Abinash Roy and Masud H. Chowdhury, “Global Interconnect Optimization in the Presence of On-chip Inductance”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) , 27-30 May 2007, Page(s):885-888

27.   Jingye Xu and Masud H. Chowdhury, “Power Consumption Analysis of Flip-flop Based Interconnect Pipelining”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) , 27-30 May 2007, Page(s):3716-3719

28.   Abinash Roy, Jingye Xu and Masud H. Chowdhury, “Inductance Aware Performance and Reliability Analysis of High Performance Integrated Circuits”, Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 103-107

29.   Abinash Roy and Masud H. Chowdhury, “RF/Wireless Interconnects in Future On-Chip and Board-Level Clock Distribution Network”, Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 627-630

30.   Pervez Khaled, Jingye Xu, and Masud H. Chowdhury, “Better Leakage Reduction by Exploiting the Built-in MOSFET-Vth Characteristics”, Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 98-102

31.   Jingye Xu, Abinash Roy and Masud H. Chowdhury, “Noise Separation in Analog Integrated Circuits Using Blind Source Separation” Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 16-20

32.   Pervez Khaled and Masud H. Chowdhury, "Impacts of Frequency, Thin-film,
Barrier Thickness, and Temperature on Interconnect Resistance and Propagation Delay", Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 617-620

33.   Abinash Roy, Sharada Jha and Masud H. Chowdhury, “Accurate Analysis of Switching Patterns in High Speed On-chip Global Interconnects”, Proceedings of the 2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 11-14 December 2007, Page(s): 705-708.

34.   Md. Sajjad Rahaman and Masud H. Chowdhury, “Multi-Carrier CDMA-Interconnect for Inter- and Intra-ULSI Communications”, Proceedings of the 2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 11-14 December 2007, Page(s): 1059-1062.

35.   Shriram Krishnamoorthy and Masud H. Chowdhury, “Analysis of spatial temperature distribution in ICs”, Proceedings of the 2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 11-14 December 2007, Page(s): 1272-1275.

36.   Jingye Xu and Masud H. Chowdhury, “Accurate Delay Estimation in the Presence of Coupling Noise Using Complete Waveform Accuracy”, Proceedings of the 2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 11-14 December 2007, Page(s): 166-169.

Year 2006:

37.   Vivek Nigam, Masud H. Chowdhury and Roland Priemer, “Blind Source Separation Based Compound Noise Analysis in Digital Circuits”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) 2006, 21-24 May 2006, pp 1929-1932

38.  Jingye Xu and Masud H. Chowdhury, “Latch Based Interconnect Pipelining For High Speed Integrated Circuits”, Proceedings of Sixth IEEE International Conference on Electro/Information Technology (EIT2006), 7-10 May, 2006, pp. 303-308.

39.  Abinash Roy and Masud H. Chowdhury, "Global interconnect optimization and
impact of inductance on the overall performance," Proceedings of the 10th World Multi-conference on Systemics, Cybernetics and Informatics (WMSCI 2006), Volume 3, 16-19 July 2006, Pages 180-184

40.   Jingye Xu and Masud H. Chowdhury, “Issues of Interconnect Pipelining and the Impacts of Clock Signal Variations”, Proceedings of the 10th World Multi-conference on Systemics, Cybernetics and Informatics  (WMSCI 2006), Volume 3, 16-19 July 2006, Pages 191-196

41.   Pervez Khaled and Masud H. Chowdhury, “Future Challenges and Limitations of Power Bus Modeling and Decoupling Capacitors for Package-Chip Co-Design”, Proceedings of the 10th World Multi-conference on Systemics, Cybernetics and Informatics  (WMSCI 2006), Volume 3, 16-19 July 2006, Pages 162 - 166

42.   Jingye Xu and Masud H. Chowdhury, “ Bit Error Rate Analysis for Flip-flop and Latch Based Interconnect Pipelining”, Proceedings of 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), 10-13 December 2006 Page(s):1061 - 1064

43.   Vivek Nigam, Masud Chowdhury and Roland Priemer, “Separation of Individual Noise Sources from Compound Noise Measurements in Digital Circuits”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1605-1608

44.   Abinash Roy and Masud H Chowdhury, “Impacts of Inductance on the Figures of Merit to Optimize Global Interconnect”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1448-1451

45.   Pervez Khaled and Masud H Chowdhury, “Prospects and Challenges of Handling Power Bus Modeling and Supply Noise in Package-Chip Co-design Approach”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1109-1113

46.   Chuen M. Tan and Masud H. Chowdhury, “Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 2006-2009

47.   Geetanjali Kshirsagar and Masud H Chowdhury, “Optical Interconnect Technology - Photons Based Signal Communication”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1452-1455

48.  Jingye Xu and Masud H. Chowdhury, “Analysis of Bit Error Rate for Interconnect Pipelining”, Proceedings of The Fourth IASTED International Conference on Circuits, Signals, and Systems (CSS 2006), November 20-22, 2006, Page(s): 308-312

49.  Pervez Khaled, Chuen M. Tan, and Masud H. Chowdhury, “Analysis of Compound Noise in Nanometer Scale Circuits: Capacitive Coupling and Leakage Noises”, Proceedings of The Fourth IASTED International Conference on Circuits, Signals, and Systems (CSS 2006), November 20-22, 2006, Page(s):  82-83

Year 2005:

50.   G. Memik, Masud H. Chowdhury, A. Mallik and Y.I. Ismail, “Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files”, Proceedings. International Conference on Dependable Systems and Networks, 2005. DSN 2005. 28-01 June 2005 Page(s):770 – 779

Year 2004:

51.   Masud H. Chowdhury and Y.I. Ismail, “Analysis of coupling noise and it's scalability in dynamic circuits,” Proceedings of the IEEE Custom Integrated Circuits Conference (CICC) 2004. 3-6 Oct. 2004 Page(s):505 - 508

52.   Masud H. Chowdhury and Y.I. Ismail, “Possible noise failure modes in static and dynamic circuits,” Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC) 2004, .19-21 July 2004 Page(s):123 - 126

Year 2003:

53.   C.S. Amin, Masud H. Chowdhury and Y.I. Ismail, “Realizable RLCK circuit crunching,” Proceedings of the IEEE/ACM Design Automation Conference (DAC) 2003, 2-6 June 2003 Page(s):226 - 231

54.   Masud H. Chowdhury, and Y.I. Ismail, “Analysis of coupling noise in dynamic circuit,” Proceedings of  the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC) 2003, 30 June-2 July 2003 Page(s):320 – 325

55.   Masud H. Chowdhury, C.S. Amin and Y.I. Ismail, C.V. Kashyap, B.L. Krauter, “Realizable reduction of RLC circuits using node elimination,”  Proceedings of the International Symposium on Circuits and Systems (ISCAS) 2003, Volume 3,  25-28 May 2003 Page(s):III-494 - III-497 vol.3

Year 2002:

56.   Masud H. Chowdhury, Y.I Ismail, C.V Kashyap and ,.; B. L. Krauter, “Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance”, IEEE International Symposium on Circuits and Systems (ISCAS) 2002, Volume 4,  26-29 May 2002 Page(s):IV-197 - IV-200 vol.4

Year 2001:

57.   Masud H. Chowdhury, S. Hsien and Y. I. Ismail, “Circuit and Signal Integrity Challenges in Systems-On-a-Chip”, IEEE 5th World Multi-conference on Systemics, Cybernetics and Informatics (SCI),  Vol. XV, Industrial Systems: Part II, pp 181-186, July 2001

 

In Submission (Journal):

58.   Jingye Xu, Abinash Roy, Pervez Khaled, and Masud H. Chowdhury, “Handling Bit Error Rate in Flip-flop based Interconnect Pipelining”, Submitted to Journal of Circuits, Systems and Computers (JCSC)

59.   Jingye Xu, Abinash Roy and Masud H. Chowdhury, “Optimization Scheme for Flip-flop Based Interconnect Pipelining”, Submitted to Journal of Circuits, Systems & Signal Processing, Springer

60.   A. Roy and M. H. Chowdhury, “Analysis of the Impacts of Signal Slew and Skew on the Behavior of Coupled RLC Interconnects for Different Switching Patterns,” Submitted to IEEE Transactions on Very Large Scale Integration Systems (TVLSI),

61.   Pervez Khaled, Jingye Xu, and Masud H. Chowdhury, “Dual-Vth Reduced Power Gating Structure for Better Leakage Reduction”, Submitted to IEEE Transaction on VLSI (TVLSI)

62.   Jingye Xu and Masud H.Chowdhury, “Estimation of Delay in Coupled Digital Circuits using Full Wave Accuracy”, Submitted to IEEE Transaction on VLSI (TVLSI)

XV, Industrial Systems: Part II, pp 181-186, July

Copyright © 2004 The Board of Trustees of the University of Illinois