Dr. Masud Chowdhury

 

 

 

Current Resume (downloadable  pdf)

Masud H. Chowdhury

Assistant Professor

Electrical and Computer Engineering, University of Illinois at Chicago, URL: www.ece.uic.edu/~masud

Education

§         Doctor of Philosophy (June 2004)

Northwestern University, Evanston, Illinois 60208, USA 

§         Bachelor of Science (December 1998)

Bangladesh University of Engineering and Technology, Dhaka, Bangladesh

Research Interests

High performance issues of Deep Sub-Micron and Nanometer Scale Integrated Circuits:

q       High Performance Issues of Nanometer Scale Integrated Circuit

q       Alternative Techniques and Technologies for Integrated Circuits Design and Analysis

q       Chip-Package Co-Design Issues

Teaching

 

-  ECE 467: Introduction to VLSI Design                                   -  ECE 567: Advanced VLSI Design

-  ECE 468: Analog and Mixed Signal VLSI Design                  -  ECE 265: Introduction to Logic Design

Work Experiences

§         Assistant Professor (From August 2004)

Electrical and Computer Engineering, University of Illinois at Chicago

§         IBM Summer Internship (Summer 2001)

IBM Austin Research Lab, Austin, Texas, USA

§         Graduate Research/Teaching Assistant (Sep.2000–Jun.2004)

Electrical and Computer Engineering, Northwestern University

§         Lecturer (January 1999 – December 1999)

Department of Computer and Communication Engineering, IIUC, Bangladesh

Program Committee Member

1.       IEEE Circuits and System Society VLSI Track TPC

2.       IEEE Great Lake Symposium on VLSI (GLSVLSI)

3.        World Multi-Conference on Systemics, Cybernetics and Informatic

Session Chair

1.       Digital VLSI, IASTED Int. Conf. on Circuits, Signals, and Systems 2006, San Francisco, CA, USA

2.       VLSI Circuits, IEEE GLSVLSI 2005, Chicago, IL, USA

3.       Memory Design & Analysis, ISCAS 2006, Island of Kos, Greece

4.       Reconfigurable Circuits, ISCAS 2006, Island of Kos, Greece

5.       Communication Circuits, ISCAS 2007, May 27-30, 2007, New Orleans, LA, USA

6.       Low Power Circuits, ISCAS 2007, May 27-30, 2007, New Orleans, LA, USA

7.       Power Circuits IV, ISCAS 2007, May 27-30, 2007, New Orleans, LA, USA

8.       Low Power Logic & Architectures I, ISCAS 2007, May 27-30, 2007, New Orleans, LA, USA

9.       VLSI for Communications II, ISCAS 2007, May 27-30, 2007, New Orleans, LA, USA

10.    Computer Systems and Intelligent Systems, IEEE EIT 2007, May 17-20, 2007, Chicago, IL, USA

11.    Circuits and Electronics, IEEE EIT 2007, May 17-20, 2007, Chicago, IL, USA

Reviewer

 

1.        IEEE Transaction on Circuits and Systems (TCAS)

2.        IEEE Transactions on Computer Aided Design (TCAD)

3.        IEEE Transactions on VLSI (TVLSI)

4.        IEEE Great Lake Symposium on VLSI (GLSVLSI)

5.        IEEE/ACM Design Automation Conference (DAC)

6.        International Symposium on Circuits and Systems (ISCAS)

7.        Proceedings of IET

8.        Elsevier Journal of Computers & Electrical Engineering

Listings

§         Academic Keys Who's Who in Engineering Education (WWEE)

§         Strathmore's Who's Who

Professional

Memberships

1.       Institute of Electrical and Electronic Engineers (IEEE)

2.       Institution of Engineering and Technology (IET)

3.       International Association of Science and Technology for Development (IASTED)

4.       Community of Science

5.       Association of Computing Machine (ACM)

6.       American Association for the Advancement of Science (AAAS)

 

Academic

Awards

1.        Best Paper Award, Computer Science and Engineering Session, The 10th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI 2006)

2.        Best Paper Award, IEEE 5th World Multi-conference on Systemics, Cybernetics and Informatics, 2001, Orlando, Florida, USA

3.        Best Poster Award, ECE EXPO Day 2003, Northwestern University

4.        Technical Scholarship, Bangladesh University of Engineering and Technology

5.        Merit Scholarship, Secondary & Higher Secondary Education Board, Bangladesh

6.        Best Student of the Class, Saint Placid’s High School, Chittagong, Bangladesh

7.        Best Student of the School, Saint Placid’s High School, Chittagong, Bangladesh

8.        Government Junior High School Merit Scholarship

 

Patent Disclosures

§         Masud H. Chowdhury, C. S. Amin, and Y. I. Ismail, “Realizable Reduction of RLC Circuits Using Node Elimination.” Patent pending with Semiconductor Research Corporation (SRC)

Publications

1.        Masud H. Chowdhury and Yehea I. Ismail, "Behavior and Analysis of Deep Sub-micron Integrated Circuits Including Self and Mutual Inductances, " Journal of Circuits, Systems & Signal Processing, Springer, In Press

2.        Jingye Xu, Abinash Roy, and Masud H.Chowdhury, “Noise Separation in Analog Integrated Circuits”, Journal of Integrated Computer-Aided Engineering (ICAE), In Press.

3.        Jingye Xu, Abinash Roy, and Masud H. Chowdhury, “Power Consumption and BER of Flip-flop Inserted Global Interconnect", Journal of VLSI Design, Volume 2007, Article ID 42829, 8 Pages, 2007

4.        Masud H. Chowdhury and Yehea I. Ismail, “Realistic Scalability of Noise in Dynamic Circuits,” IEEE Transaction on Very Large Scale Integration (TVLSI), Volume 14, Issue 6, June 2006 Page(s): 637 - 641

5.        C.S. Amin, Masud H Chowdhury and Y.I. Ismail, “Realizable reduction of interconnect circuits including self and mutual inductances,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 24,  Issue 2,  Feb. 2005 Page(s):271 – 277

6.        Abinash Roy and Masud H. Chowdhury, “Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew”, Proceedings of 44th IEEE/ACM Design Automation Conference (DAC) 2007, 4-8 June 2007, Page(s):184 - 187

7.        Jingye Xu, Abinash Roy, Masud Chowdhury, "Analysis of Power Consumption
and BER of Flip-flop Based Interconnect Pipelining" Proceedings IEEE/ACM of Design,
Automation and Test in Europe (DATE) 2007, April 16-19, 2007, pp. 1218-1223

8.        Pervez Khaled, Jingye Xu, and Masud H. Chowdhury, “Dual Diode-Vth Reduced Power Gating Structure for Better Leakage Reduction”, IEEE MWCAS 2007, In Press

9.     Shriram Krishnamoorthy and Masud H. Chowdhury, “Nodal and Spatial Analysis for a Compact Thermal Modeling Methodology”, Proceedings of The 15th annual IEEE International Conference on Advanced Thermal Processing of Semiconductors (RTP2007), In Press

10.  Abinash Roy, Noha Mahmud and Masud H. Chowdhury, “Delay and Clock Skew Variation due to Coupling Capacitance and Inductance” Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) , 27-30 May 2007, Page(s):621 - 624

11.  Abinash Roy and Masud H. Chowdhury, “Global Interconnect Optimization in the Presence of On-chip Inductance”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) , 27-30 May 2007, Page(s):885-888

12.  Jingye Xu and Masud H. Chowdhury, “Power Consumption Analysis of Flip-flop Based Interconnect Pipelining”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) , 27-30 May 2007, Page(s):3716-3719

13.  Abinash Roy, Jingye Xu and Masud H. Chowdhury, “Inductance Aware Performance and Reliability Analysis of High Performance Integrated Circuits”, Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 103-107

14.  Abinash Roy and Masud H. Chowdhury, “RF/Wireless Interconnects in Future On-Chip and Board-Level Clock Distribution Network”, Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 627-630

15.  Pervez Khaled, Jingye Xu, and Masud H. Chowdhury, “Better Leakage Reduction by Exploiting the Built-in MOSFET-Vth Characteristics”, Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 98-102

16.  Jingye Xu, Abinash Roy and Masud H. Chowdhury, “Noise Separation in Analog Integrated Circuits Using Blind Source Separation” Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 16-20

17.  Pervez Khaled and Masud H. Chowdhury, "Impacts of Frequency, Thin-film,
Barrier Thickness, and Temperature on Interconnect Resistance and Propagation Delay", Proceedings of Seventh IEEE International Conference on Electro/Information Technology (EIT2007), May 17-20, 2007, Page(s): 617-620

18.     Abinash Roy, Sharada Jha and Masud H. Chowdhury, “Accurate Analysis of Switching Patterns in High Speed On-chip Global Interconnects”, Accepted in IEEE ICECS 2007, In Press.

19.     Md. Sajjad Rahaman and Masud H. Chowdhury, “Multi-Carrier CDMA-Interconnect for Inter- and Intra-ULSI Communications”, Accepted in IEEE ICECS 2007, In Press.

20.     Shriram Krishnamoorthy and Masud H. Chowdhury, “Analysis of spatial temperature distribution in ICs”, Accepted in IEEE ICECS 2007, In Press.

21.     Jingye Xu and Masud H. Chowdhury, “Accurate Delay Estimation in the Presence of Coupling Noise Using Complete Waveform Accuracy”, Accepted in IEEE ICECS 2007, In Press.

22.     Vivek Nigam, Masud H. Chowdhury and Roland Priemer, “Blind Source Separation Based Compound Noise Analysis in Digital Circuits”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) 2006, 21-24 May 2006, pp 1929-1932

23.     Jingye Xu and Masud H. Chowdhury, “Latch Based Interconnect Pipelining For High Speed Integrated Circuits”, Proceedings of Sixth IEEE International Conference on Electro/Information Technology (EIT2006), 7-10 May, 2006, pp. 303-308.

24.     Abinash Roy and Masud H. Chowdhury, "Global interconnect optimization and
impact of inductance on the overall performance," Proceedings of the 10th World Multi-conference on Systemics, Cybernetics and Informatics (WMSCI 2006), Volume 3, 16-19 July 2006, Pages 180-184

25.     Jingye Xu and Masud H. Chowdhury, “Issues of Interconnect Pipelining and the Impacts of Clock Signal Variations”, Proceedings of the 10th World Multi-conference on Systemics, Cybernetics and Informatics  (WMSCI 2006), Volume 3, 16-19 July 2006, Pages 191-196

26.     Pervez Khaled and Masud H. Chowdhury, “Future Challenges and Limitations of Power Bus Modeling and Decoupling Capacitors for Package-Chip Co-Design”, Proceedings of the 10th World Multi-conference on Systemics, Cybernetics and Informatics  (WMSCI 2006), Volume 3, 16-19 July 2006, Pages 162 - 166

27.     Jingye Xu and Masud H. Chowdhury, “ Bit Error Rate Analysis for Flip-flop and Latch Based Interconnect Pipelining”, Proceedings of 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), 10-13 December 2006 Page(s):1061 - 1064

28.     Vivek Nigam, Masud Chowdhury and Roland Priemer, “Separation of Individual Noise Sources from Compound Noise Measurements in Digital Circuits”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1605-1608

29.     Abinash Roy and Masud H Chowdhury, “Impacts of Inductance on the Figures of Merit to Optimize Global Interconnect”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1448-1451

30.     Pervez Khaled and Masud H Chowdhury, “Prospects and Challenges of Handling Power Bus Modeling and Supply Noise in Package-Chip Co-design Approach”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1109-1113

31.     Chuen M. Tan and Masud H. Chowdhury, “Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 2006-2009

32.     Geetanjali Kshirsagar and Masud H Chowdhury, “Optical Interconnect Technology - Photons Based Signal Communication”, Proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), December 4-7, 2006, Page(s): 1452-1455

33.     Jingye Xu and Masud H. Chowdhury, “Analysis of Bit Error Rate for Interconnect Pipelining”, Proceedings of The Fourth IASTED International Conference on Circuits, Signals, and Systems (CSS 2006), November 20-22, 2006, Page(s): 308-312

34.     Pervez Khaled, Chuen M. Tan, and Masud H. Chowdhury, “Analysis of Compound Noise in Nanometer Scale Circuits: Capacitive Coupling and Leakage Noises”, Proceedings of The Fourth IASTED International Conference on Circuits, Signals, and Systems (CSS 2006), November 20-22, 2006, Page(s):  82-83

35.     G. Memik, Masud H. Chowdhury, A. Mallik and Y.I. Ismail, “Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files”, Proceedings. International Conference on Dependable Systems and Networks, 2005. DSN 2005. 28-01 June 2005 Page(s):770 – 779

36.     Masud H. Chowdhury and Y.I. Ismail, “Analysis of coupling noise and it's scalability in dynamic circuits,” Proceedings of the IEEE Custom Integrated Circuits Conference (CICC) 2004. 3-6 Oct. 2004 Page(s):505 - 508

37.     Masud H. Chowdhury and Y.I. Ismail, “Possible noise failure modes in static and dynamic circuits,” Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC) 2004, .19-21 July 2004 Page(s):123 - 126

38.     C.S. Amin, Masud H. Chowdhury and Y.I. Ismail, “Realizable RLCK circuit crunching,” Proceedings of the IEEE/ACM Design Automation Conference (DAC) 2003, 2-6 June 2003 Page(s):226 - 231

39.     Masud H. Chowdhury, and Y.I. Ismail, “Analysis of coupling noise in dynamic circuit,” Proceedings of  the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC) 2003, 30 June-2 July 2003 Page(s):320 – 325

40.     Masud H. Chowdhury, C.S. Amin and Y.I. Ismail, C.V. Kashyap, B.L. Krauter, “Realizable reduction of RLC circuits using node elimination,”  Proceedings of the International Symposium on Circuits and Systems (ISCAS) 2003, Volume 3,  25-28 May 2003 Page(s):III-494 - III-497 vol.3

41.     Masud H. Chowdhury, Y.I Ismail, C.V Kashyap and ,.; B. L. Krauter, “Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance”, IEEE International Symposium on Circuits and Systems (ISCAS) 2002, Volume 4,  26-29 May 2002 Page(s):IV-197 - IV-200 vol.4

42.     Masud H. Chowdhury, S. Hsien and Y. I. Ismail, “Circuit and Signal Integrity Challenges in Systems-On-a-Chip”, IEEE 5th World Multi-conference on Systemics, Cybernetics and Informatics (SCI),  Vol. XV, Industrial Systems: Part II, pp 181-186, July 2001

Copyright © 2004 The Board of Trustees of the University of Illinois