Current Projects

1. Incremental Placement and Routing Algorithms for FPGA and VLSI Circuits
   
   
2. FPGA Testing and Defect/Fault Tolerance
   
   
3. Simultaneous Exploration of Objective Optimization and Design Constraints during Placement for Deep Sub-Micron VLSI
   
   
4. Timing-Driven Partitioner
   
   
5. VHDL Modeling of Processor Faults Induced by EM Disturbances